STUDY OF FPGA BOARD AND TESTING LEDS AND SWITCHES

STUDY OF FPGA BOARD AND TESTING

LEDS AND SWITCHES

AIM:

To Study FPGA using FPGA board and testing using LED’s &switches.

APPARATUS REQUIRED:

·        Personal computer

·        Xilinx ISE software

PROCEDURE:

·        Open Xilinx ISE software.

·        Open file new project

·        Enter default data on the dialog box

·        Select new source from project.

·        Enter file name.

·        Specify the input output ports.

·        Type the output syntax.

·        Select new source from project.

·        Select UCF file, select file name, select pin design and package pin.

·        Then switch ‘ON’ the kit and go to the implement design and generate programming file.

·        Then go to PROM file and generate the PROM file and get succeeded.

·        Then go to the configurable devices and then the startup.

PROGRAM:

module io(sw,led);

input [15:0]sw;

output[15:0]led;

assign led=sw;

end module

UCF:

NET “sw<0>”     LOC = ”t14”;

NET “sw<1>”     LOC = ”t12”;

NET “sw<2>”     LOC = ”t9”;

NET “sw<3>”     LOC = ”t7”;

NET “sw<4>”     LOC = ”t2”;
NET “sw<5>”     LOC = ”g12”;

NET “sw<6>”     LOC = ”h1”;

NET “sw<7>”     LOC = ”r3”;

NET “sw<8>”     LOC = ”r11”;

NET “sw<9>”     LOC = ”n3”;

NET “sw<10>”   LOC = ”m13”;

NET “sw<11>”   LOC = ”m7”;

NET “sw<12>”   LOC = ”m3”;

NET “sw<13>”   LOC = ”k4”;

NET “sw<14>”   LOC = ”j12”;

NET “sw<15>”   LOC = ”j11”;

NET “led<0>”    LOC = ”r1”;

NET “led<1>”    LOC = ”r2”;

NET “led<2>”    LOC = ”k3”;

NET “led<3>”     LOC = ”t4”;

NET “led<4>”     LO1`C = ”t5”;

NET “led<5>”     LOC = ”r6”;

NET “led<6>”     LOC = ”t8”;

NET “led<7>”     LOC = ”n10”;

NET “led<8>”     LOC = ”n0”;

NET “led<9>”     LOC = ”p12”;

NET “led<10>”   LOC = ”r9”;

NET “led<11>”   LOC = ”n12”;

NET “led<12>”   LOC = ”p13”;

NET “led<13>”   LOC = ”r13”;

NET “led<14>”   LOC = ”t13”;

NET “led<15>”   LOC = ”p14”;

RESULT:

Thus the study of FPGA board and testing using LED’s and switches is verified.